Publications 2009

[c09.1]
J. Hilljegerdes, P. Kampmann, S. Bosse, F. Kirchner, Development of an Intelligent Joint Actuator Prototype for Climbing and Walking Robots (Proceeding), 12th International Conference on Climbing and Walking Robots and the Support Technologies for Mobile Machines, 09-11 September 2009, Istanbul, Turkey, 2009, DOI:10.1142/9789814291279_0115.
In this paper, a new joint actuator is introduced which builds the basis for the newly developed SpaceClimber robot by the German Research Center for Artificial Intelligence. Based on in-house developed joint actuators for ambu-lating robots, this complete new design combines performance, stability, and space-related components. The newly developed on-board electronics enables the possibility of a biologically inspired functionality like decentralized au-tonomous joint control. In this paper, we explain the design and the control architecture of the actuator. We describe the selected components and present the fully functional prototype. The results of the first performance experiments are presented.
[c09.2]
D. Lehmhus, M. Busse, H. W. Zoch, W. Lang, S. Bosse, F. Kirchner, Sensor usage in the transport industry – a review of current concepts and future trends (Conference), European Congress and Exhibition on Advanced Materials and Processes, 7-10. Sep.2009, Glasgow UK, 2009.
[r09.1]
S. Bosse, ConPro: Rule-Based Mapping of an Imperative Programming Language to RTL for Higher-Level-Synthesis Using Communicating Sequential Processes (Techreport)
The ConPro programming language, an new enhanced imperative programming language is mapped to Register-Transfer-Logic using a higher-level-synthesis approach performed by the syn- thesis tool ConPro. In contrast to other approaches using modified existing software languages like C, this language is designed from scratch providing a consistent model for both hardware de- sign and software programming. The programming model and the language provide parallelism on control path level using a multi-process model with communicating sequential processes (CSP), and on data path level using bounded program blocks. Each process is mapped to a Finite- State-Machine and is executed concurrently. Additionally, program blocks can be parameterized and can control the synthesis process (scheduling and allocation). Synthesis is based on a non- iterative, multi-level and constraint selective rule-set based approach, rather than on a traditional constrained iterative scheduling and allocation approach. Required inter-process communication is provided by a set of primitives, entirely mapped to hardware, already established in concurrent software programming (multi-threading), implemented with an abstract data type object model and method-based access. It is demonstrated that this synthesis approach is efficient and stable enough to create complex circuits reaching the million gates boundary.